WP 1.3.8 Obsolescence Management through Hardware Emulation of FPGA
Aim The aim of this work package is to provide the information to clarify the extent to which hardware emulation using Field Programmable Gate Arrays (FPGAs) can overcome obsolescence and reduce cost, within the context of MOD processes (e.g. Def Stan 00-56) and the certification regime. This work has a wide applicationforming part of a wider strategy to certify promising products within safety certification.
Content The QinetiQ Real Time Embedded Systems Group will lead this work package. The overall thrust of this research is to address the issues raised by obsolescent processors by the use of emulation on Field Programmable Gate Arrays (FPGAs). By emulating the obsolete processor using an FPGA, changes are not required to the original object code and a costly recertification effort is minimised. For safety critical systems this offers the potential to achieve a significant cost saving. The emulator would be constructed to be a generic processor with a layer of firmware that would perform object code translation. The system would be constructed to allow the processor-dependant part to be changed easily and allow multiple different processors to be emulated without changing the "core" of the emulator.
This initial study will consist of three strands. Firstly, evaluating current methods of dealing with obsolete components and determining the scope in which FPGA's could be used within this area. The work will then address the question of whether an FPGA (in both hardware and design) can be certified to relevant MOD standards for safety systems (specifically aimed at obsolete processors in the avionics arena). The intention is to exploit previous work by QinetiQ on formally proven processors for Safety Critical systems. FPGA technology allows these processors to be realised without the high cost of an ASIC. Finally, the work will progress to address what level of performance the FPGA could provide with emulation and map this to existing end of life processors used within in-service equipment.
This work has strong linkage to WP 1.3.7 Certification of RePLACE.
Outcome The outcome of this work package will deliver an assessment as to the extent to which hardware emulation using Field Programmable Gate Arrays (FPGAs) can overcome obsolescence and reduce cost. This outcome will be shared with the stakeholder community through the TI MPA website.
